EEPROMs having long-term retention of electric charge are well-known in the art as information-storage devices. An EEPROM is characterized by having a floating gate to which there is no direct electrical connection and a control gate with a direct electrical connection. The floating gate is separated from a substrate region by an insulating layer of, for example, silicon dioxide. The substrate region typically includes symmetrical source and drain regions (below the floating gate) which define a channel. The control gate of the EEPROM is generally positioned over the floating gate with a layer of insulating material separating the two gates. To program a transistor, charge is transferred from the substrate through the insulator and is stored on the floating gate of the transistor. Programming and erasing of an EEPROM are done using voltage pulses that either place charge on or remove charge from the floating gates in selected memory cells.
Typically, programming an EEPROM is accomplished by hot electron channeling. For hot electron channeling to occur, a sufficiently high voltage is applied to the control gate and drain with the source being grounded to create a flow of electrons in the channel region. Some of these hot electrons have enough energy to channel through the insulator to charge the floating gate. This negative charge remains after the high voltage is removed, thereby leaving the EEPROM with a higher threshold voltage than that obtained without the negative charge on the floating gate (i.e. in a continuous "off" state). Thus, even when a logic high is applied to the control gate, the EEPROM remains off.
One disadvantage of hot electron channeling is that the high voltages needed to program are generally not available on-circuit. Hence, external programming circuitry must be used.
Erasing of an EEPROM is generally based on Fowler-Nordheim tunneling of electrons from the floating gate to the source. This tunneling is accomplished by grounding the control gate and raising the voltage in the source region, thereby causing the stored charge on the floating gate to flow back to the substrate. Of critical importance is the thinness of the insulating layer surrounding the floating gate. Typically, the thickness of the insulating layer between the floating gate and the substrate must be in the rang of 10 nanometers to facilitate Fowler-Nordheim tunneling.
However, thin oxides are difficult to achieve without defects. Because the retention of information by an EEPROM is limited by defect density, high endurance is exceedingly difficult to attain. Additionally, reliability problems may occur as high voltages cause charge to pass through defective oxide, thereby causing the loss of valuable data.
Therefore, a need arises for a small and shrinkable EEPROM which achieves high speed programming and erasing with low power.